A typical optical communication system (cf. FIG. 1: typical optical link; FIG. 2: typical optical link signalling) comprises three components:                a light-emitting element LD, for example a laser diode, together with its driver DR, which converts the electrical data logic levels to optical power logic levels;        a light guide GU, for example a fibre, which carries the light; and        a light-receiving element PD, for example a photodetector, such as a photodiode, together with a transimpedance amplifier TA, which senses the light at the end of the light guide GU and converts the light back to an electrical signal.        
Such a system typically transmits two-level electrical data pattern Vin-data-digital and recovers a replica two-level electrical data pattern Vout-data-digital at the receiver side. Light (optical) power levels P1 and P0 (cf. FIG. 2) injected into the light guide GU correspond to each electrical level VHIGH and VLOW. It follows that, at the receiver side, two different light power levels arrive at the input of the light-receiving element PD. These two different light power levels generate two different current levels, namely I1 and I0.
The current signal IPD generated at the light-receiving element PD has to be converted to a voltage signal. The current generated by the light-receiving element PD is converted to voltage by the transimpedance amplifier TA, wherein Vout-data-analog=R*Iin-main, with R being the gain or transimpedance of the transimpedance amplifier TA.
An integrator IN in the feedback path FP generates a control signal Vint in order to subtract the average input current coming from the light-receiving element PD. This is done in order to generate the zero crossing in the input of a limiter LI. The limiter LI acts as a comparator which generates in its output a VHIGH (VLOW) logic level for positive (negative) voltages in its input. The automatic gain control block AG controls the transimpedance amplifier gain R in order to keep the amplitude Vout-data-analog to a desired level (for example constant) for different IPD current levels that might occur as input to the transimpedance amplifier TA.
In case another low speed signal is to be transmitted from the transmitter side to the receiver side, a status change in the transmitter side could be transmitted to the receiver side. This could be for example a change from EIOS (Electrical Idle Ordered Set—a type of data link layer packet) state to EIEOS (Electric Idle Exit Ordered Set) state in the PCI Express standard.
Another optical link could be dedicated to the new signal. However, this is very costly because extra components and extra power is required. Also in some cases, dedicating a complete extra optical link might not be an option at all.
If the slow speed signal is transmitted over the same optical link, which means that the high-speed signals and the low-speed signals share the same optical components (physical medium), a third optical power level P2 different from P1 and from P0 is to be transmitted in order to be able to distinguish between the two signals, making a multi-level signalling necessary.